C8051F340/1/2/3/4/5/6/7 devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted
features are listed below. Refer to Table 1.1 for specific product feature selection
BurchED B5-X300 Spartan2e
using XC2S300e device
Top level file for 6809 compatible system on a chip
Designed with Xilinx XC2S300e Spartan 2+ FPGA.
Implemented With BurchED B5-X300 FPGA board,
B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for simulation and synthesis. The library is vendor independent, with support for different
CAD tools and target technologies. A unique plug&play method is used to configure and connect
the IP cores without the need to modify any global resources.
LCD Driver datasheet
The SPF54126A, a 262144-color System-on-Chip (SoC) driver LSI designed for small and medium sizes of TFT LCD display, is capable of
supporting up to 176xRGBx220 in resolution which can be achieved by the designated RAM for graphic data. The 528-channel source
driver has true 6-bit resolution, which generates 64 Gamma-corrected values by an internal D/A converter. The source driver of
SPFD54126A adopts OP-AMP structure to enhance display quality and it cooperates with advanced circuitry techniques to reduce power
consumption.
